Renesas Electronics
Senior/Staff Engineer, Design Verification
Job · Full-timeIn OfficeBengaluruEntry level / 0-2 years1 opening
About this role
Renesas Electronics is hiring for Senior/Staff Engineer, Design Verification in Bengaluru. This opening was published by Renesas Electronics on their official smartrecruiters careers board on 9 September 2026 and was verified as still open on 17 September 2026.
About the role
Responsibilities:
•…
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Skills you'll use
PythonC++CommunicationRAgileMicrocontrollersIoTDebugging
What you'll do
- Be a part of end‑to‑end verification execution for SOC owning complex digital IP’s and subsystems from specification to sign‑off
- Define and drive IP‑level verification strategies, including test plans, coverage models, and closure criteria
- Develop scalable, reusable UVM‑based verification environments for IP and subsystem verification
- Lead functional, code, assertion, and cross‑coverage closure, ensuring high‑quality sign‑off with clear metrics
- Apply AI/ML‑assisted verification techniques to accelerate coverage convergence, identify stimulus gaps, and optimize regression efficiency
- Drive constraint random and directed test methodologies for thorough protocol, corner‑case, and stress verification
- Collaborate with RTL, Architecture, Emulation, and SoC Verification teams to ensure seamless IP integration
- Review IP specifications and work with architects to translate requirements into robust verification plans and checkers
- Develop and deploy advanced checkers, scoreboards, assertions (SVA), and protocol monitors
- Work with EDA vendors to evaluate and adopt next‑generation verification, coverage, and analytics tools
Who can apply
- Bachelor’s or Master’s degree in electronics Engineering
- 3-8 years of experience in SoC Verification domains and have working knowledge of industry standard EDA toolkits.  
- Strong expertise in UVM‑based testbench architecture and development
- Proven experience in metric‑driven verification, including functional and code coverage closure
- Deep understanding of SystemVerilog, UVM, assertions (SVA), and verification best practices
- Experience with directed and constrained‑random verification methodologies
- Experience debugging complex design issues in simulation, emulation, and post‑silicon environments
- Proficiency in Verilog/SystemVerilog, with working knowledge of C/C++, Shell scripting
- Strong analytical, problem‑solving, and communication skills
- Preferred/Plus Qualifications
About Renesas Electronics
About Renesas Electronics
• Why Join Us We asked our employees why they choose to work at Renesas, here’s what they said:...
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