Lead I/O Design Engineer

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Skills you'll use

What you'll do

• Design and develop custom IO circuits including:
• High-speed SerDes support circuits
• Perform transistor-level design and simulation using advanced CMOS technology nodes.
• Develop and optimize:
• ESD protection circuits
• On-chip termination circuits
• Conduct pre-layout and post-layout simulations for functionality, timing, power, noise, and reliability.
• Perform signal integrity analysis including:
• IBIS model generation
• Package-aware simulations

Who can apply

• Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Microelectronics, or related field.
• 5-8 years of experience in Analog/Mixed-Signal or IO Circuit Design.
• Strong understanding of:
• CMOS device physics
• Analog circuit design fundamentals
• IO architectures and standards
• ESD design methodologies
• Hands-on experience in custom circuit design using Cadence Virtuoso.
• Expertise in SPICE-based simulators such as Spectre, HSPICE, or FineSim.
• Experience with advanced technology nodes (16nm/7nm/5nm preferred).

About NXP

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