Staff ASIC Digital Engineer (SOC Verification, PCIe) with 8 to 12 years of experience

About this role

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Skills you'll use

What you'll do

• Responsible for driving verification strategy, creating Test Plans, and developing Test Benches for SoC.
• Collaborate with architects, designers,  pre-and post-silicon verification teams to develop test plans
• Responsible to develop C-based tests on SoC. Processor knowledge is a plus.
• Define and meet all functional coverage goals
• Run and debug gate-level simulations 
• Understanding and generation of functional patterns for ATE
• BE or MS degree in Electrical Engineering or Computer Engineering, with 9-13 years of experience
• Deep understanding of C, System Verilog UVM and coverage driven verification methodology

Who can apply

• Develop and execute verification plans
• Proficiency with C, Verilog & System Verilog and verification
• Experience in implementing advanced test benches, verification models, scoreboards/checkers.
• Knowledge in bus protocols - APB, AHB, AXI, and bus interconnects
• Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH
• Experience with test plan creation and test-bench development
• Experience with test development and test coverage assessment
• Excellent debugging and problem-solving skill
• Knowledge in various interfaces –   PCIe, DP, UART, I2C, I2S, SPI, USB, SD
• Create and modify SoC-level, and sub-system level test benches.

About Sandisk

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