Senior Engineer - Memory Circuit Design Verification

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Skills you'll use

What you'll do

• Minimum 3 yrs of experience with Masters background is preferrable.
• Responsibilities for fastspice (Primesim/FineSim/SpectreFx) based verification to sign-off DRAM Critical Timings.
• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
• Full Chip Analog Spice Simulation and Analysis across PVTs and Speed Grades.
• Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• collaborate with cross—geo teams (US, Japan) to develop new verification flows to take on the challenges in DRAM and emerging memory design.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.
• Good to Have Skills/Experience

Who can apply

• Good understanding of analog/mixed signal circuits and full-chip activities

About Micron

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