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SiFive

Engineer II, Physical Design - Cores

Job · Full-timeIn OfficeBengaluru3-5 years1 opening

About this role

SiFive is hiring for Engineer II, Physical Design - Cores in Bengaluru. This opening was published by SiFive on their official careers board (Workday) on 3 September 2026 and was confirmed live on 14 September 2026. Job details • Company: SiFive • Role: Engineer II, Physical Design - Cores •…

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Skills you'll use

PythonMachine LearningC++VerilogVLSI

What you'll do

  • About the Role --
  • At SiFive, we’re redefining the compute landscape with our industry-leading RISC-V compute platforms. As a Physical Design Engineer (Entry Level), you will jump-start your career by helping build our next generation of high-performance CPUs. Working closely with industry veterans, you will learn the end-to-end ASIC design flow from RTL to GDSII while contributing to real-world products on advanced process nodes.
  • We are looking for engineers who are passionate about the intersection of computer architecture and physical implementation. Rather than just executing a push-button flow, you will be trained to operate across design-abstraction layers. By leveraging a strong foundational understanding of how CPUs work, you will help bridge the gap between RTL design and physical realities, learning how architectural choices directly impact power, performance, and area (PPA).

Who can apply

  • Experience: 3+ years. We are open to considering new graduates with excellent academic credentials. If you have some work experience with physical design implementation it will be a big plus.
  • Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Strong Architectural Foundation: A solid academic grasp of computer architecture fundamentals (e.g., RISC instruction sets, processor pipelining, hazards, memory hierarchy, and cache basics).
  • Digital Design Knowledge: Strong understanding of digital logic design and the ability to read and understand RTL (Verilog or SystemVerilog).
  • VLSI Exposure: Academic coursework, projects, or internship experience related to VLSI design or ASIC flows.
  • Scripting Skills: Proficiency in at least one scripting or programming language commonly used in hardware environments (Python, Tcl, Perl, C++, or Bash).
  • Growth Mindset: Highly motivated to learn industry-standard EDA tools (Synopsys or Cadence) and eager to understand the "why" behind physical design challenges, not just the "how."

Perks & benefits

Be part of the RISC-V movement and help define the future of computing architecture.Work on industry-leading IP adopted by top customers and shipped in high volumes worldwide.Collaborate with world-class engineers in a supportive, fast-paced, learning environment.Enjoy a culture that values innovation, ownership, and technical excellence.

About SiFive

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable…

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