IP RTL Design Engineer

About this role

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Skills you'll use

What you'll do

• Role and Impact:
• As a Component IP RTL Design Engineer for Intel Unified Chassis, you will be responsible for developing, implementing, and supporting a variety of IP components, with a major focus on protocol bridges. In this role, you will collaborate with architects and senior engineers to define, design, and validate protocol bridge solutions, as well as other IP blocks as required for Unified Intel Chassis designs. Your primary work will involve protocol conversion, access control, and error handling across interfaces such as AXI, AXI-Lite, APB, IOSF-SB, HBW, and LBW, but you may also contribute to other IP development, integration, and debug activities to meet system-level requirements and quality standards.

Who can apply

• Minimum Qualifications:
• Bachelor's degree in electrical engineering, Computer Engineering, or related field.
• Minimum 6-15 years of experience in RTL coding, logic design, and simulation.
• Proficiency in hardware description languages such as Verilog or VHDL.
• Strong knowledge of digital design principles, including power, performance, and area optimization.
• Familiarity with tools for synthesis, timing analysis, and formal verification.
• Experience with debugging RTL and resolving failing tests.
• .Expertise in RAS/debug/security/telemetry

About Intel

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