Physical Design Engineer Intern
About this internship
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Skills you'll use
What you'll do
- Work on taking a netlist through floorplan, place-and-route and timing closure alongside the core team
- Apply Logic Synthesis, Static Timing Analysis (STA), Floorplanning, Place & Route (P&R) to live, production-facing problems
- Document your work clearly for reviewers and stakeholders
- Participate in reviews and act on the feedback you receive
- Collaborate across engineering, product, design or business as required
- Follow the team's quality, testing and documentation standards
Who can apply
- Pursuing or recently completed B.E./B.Tech (ECE/EEE), M.Tech (VLSI / Microelectronics) or M.Sc (Electronics) — 2026 freshers & final-year students welcome
- Working knowledge of Logic Synthesis, Static Timing Analysis (STA), Floorplanning (or a genuine willingness to learn them)
- Strong fundamentals in your discipline and clear problem-solving ability
- Care with detail and the discipline to document your work
- Clear written and verbal communication in English
- Based in or willing to work from Ranchi, Jharkhand
Perks & benefits
Interview & selection process
4 rounds — typical selection flow for this role:
- 1Application screening & resume shortlisting by the talent team
- 2Online aptitude / domain assessment
- 3Technical interview on fundamentals and your projects
- 4HR discussion — stipend, start date, expectations and offer
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