Start your career in design verification with UVM with Signalchip as a Design Verification Intern in Pune. You will sit with a working team, use the same tools and systems they do, and own a defined piece of work from day one.
About the role
As a Design Verification Intern at Signalchip, your core…
About Signalchip
Signalchip offers a mentor-led Design Verification Intern in Pune with live project work in electronics & electrical, a stipend of ₹30,000/month and a Pre-Placement Offer opportunity for strong performers.
Final-year students and recent graduates from B.E./B.Tech/Diploma in Electronics, Electrical, E&TC or Instrumentation Engineering who are based in or willing to work from Pune. You should be keen to learn SystemVerilog, UVM, Functional Coverage on real projects and able to write clearly. Freshers are welcome — no prior work experience is required, and a strong project portfolio matters more than a long CV.
Perks
Pre-Placement Offer (PPO) opportunityFlexible working hoursNetworking with senior professionalsInternship CertificateLetter of Recommendation
Interview & Selection Process
2 rounds — typical selection flow for this role:
1Application screening & resume shortlisting by the talent team