Redwolf has an open RTL Design Intern position in Vadodara for motivated freshers and final-year students. You will work on live RTL design in Verilog and SystemVerilog projects and finish with something you can genuinely talk about in interviews.
About the role
As a RTL Design Intern at Redwolf…
About Redwolf
Redwolf offers a mentor-led RTL Design Intern in Vadodara with live project work in electronics & electrical, a stipend of ₹18,000/month and a Pre-Placement Offer opportunity for strong performers.
Final-year students and recent graduates from B.E./B.Tech/Diploma in Electronics, Electrical, E&TC or Instrumentation Engineering who are based in or willing to work from Vadodara. You should be keen to learn Verilog, SystemVerilog, RTL Coding on real projects and able to write clearly. Freshers are welcome — no prior work experience is required, and a strong project portfolio matters more than a long CV.
Perks
Networking with senior professionalsInternship CertificateLetter of RecommendationMentorship from a named mentorLive project experience
Interview & Selection Process
2 rounds — typical selection flow for this role:
1Application screening & resume shortlisting by the talent team
2Practical assignment or case study with a short walkthrough